RISC-V Workshop Taiwan is part of the Informa Tech Division of Informa PLC

This site is operated by a business or businesses owned by Informa PLC and all copyright resides with them. Informa PLC's registered office is 5 Howick Place, London SW1P 1WG. Registered in England and Wales. Number 3099067.

Informa

Hsiangkai Wang
Senior Engineer at Andes Technology

Profile

Hsiangkai Wang has worked for Andes since 2010, first working on On-Chip-Debugger, a tool to help developers debug programs on real boards. Wang chose OpenOCD as the open source project for Andes ICE. It improves a lot of performance and stability for Andes debug solution. He is the main contributor of Andes architecture in OpenOCD projects. He has also helped to fix bugs and add features to OpenOCD projects.   In 2013, he joined MediaTek in Taiwan. I accumulated more and more experience on On-Chip-Debugger. In MediaTek, he had a chance to develop OpenOCD on different targets other than Andes, including ARM Cortex-R/M series and MIPS. He also developed OpenOCD/GDB to debug the MediaTek proprietary DSP.   In 2017, he joined Andes again and worked on a compiler for RISC-V architecture. He accumulated experience in LLVM development. Until now, he has experience on LLVM CodeGen, DebugInfo, and Instruction Scheduling.

Hsiangkai Wang's Network

Agenda Sessions

  • Compiler support for linker relaxation in RISC-V

    11:15