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Paul Loewenstein
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Paul Loewenstein is a Senior Technologist at Western Digital Corporation. His research interests are centered on RISC-V, including multi-processor cache coherence and contributing to the RISC-V Memory Model task group. He previously worked at Oracle on SPARC cache coherence protocols, formal memory models, deadlock and livelock avoidance and error detection and correction. Paul Loewenstein has a Ph.D. from the University of Cambridge for the application of formal methods to computer design.

Paul Loewenstein's Network

Agenda Sessions

  • Datacenter Processors with OmniXtend Interfaces for Shared Memory and AI Workload Acceleration