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Shiva Chen
Senior Engineer at Andes Technology


Shiva Chen joined Andes from 2008 to develop nds32 GCC backend porting including target ISA generation and target specific optimization pass implementation. In 2013, he joined Marvell to maintain Marvell's ARM base GCC toolchains and also contribute some ARM backend bugfix back to upstream. In 2016, he returned to Andes and started to develop LLVM RISC-V backend.

Shiva Chen's Network

Agenda Sessions

  • Compiler support for linker relaxation in RISC-V


Speakers at this event