Jhalak SharmaMS by Research VLSI at IIT Bangalore
Jhalak Sharma has completed graduation in Electronics and Communication Engineering in 2016. Currently, she is pursuing Masters by Research in VLSI, at IIIT-Bangalore since Aug 2018. Her thesis work is to create a fault injection framework to study the effects of soft errors on FPGA based systems. Soft error rate estimation is a crucial step in VLSI design to attain the required reliability and performance of the system. She is familiar with Verilog, Python, MATLAB and has worked on tools like Vivado, ISE design suite, Cadence and LTSpice.