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December 8 - 10, 2020
San Jose Convention Center,
San Jose, California

CONTRIBUTE. COLLABORATE. COMMERCIALIZE.

Save the dates now for RISC-V Summit 2020: December 8-10, Members Only Day: December 7

Attend RISC-V Summit in San Jose to be part of the disruptive force transforming the microprocessor IP market through open standard collaboration.

Call for Speakers is Open!

Want to help shape this year's conference program? Submit your speaker proposal by July 10 for a chance to get involved

2020 SESSION TRACKS

This year's program will feature exciting new projects and implementations, technical capabilities and commercial implications around the following key topic areas

Community, Ecosystem and Task Groups

Track Chair: Drew Fustini, BeagleBoard.org Foundation

Hardware Cores/SoCs

Track Co-Chair: Allen Baum, Esperanto Tech

Track Co-Chair: Chuanhua Chang, Andes Technology

Security & Functional Safety

Track Co-Chair: Jerome Quevremont,Thales Research & Technology

Track Co-Chair: Helena Handschuh, Rambus

Software & Tools

Track Chair: Arun Thomas, Draper Laboratories

System Architectures

Track Co-Chair: Andy Glew, SiFive

Track Co-Chair: Kevin Chen, Andes Technology

Verification

Track Chair: Simon Davidmann, Imperas Software

About RISC-V Summit


The third annual RISC-V Summit will highlight the continued rapid expansion of the RISC-V ecosystem, with both commercial offerings and exciting open-source developments. Newcomers to the RISC-V world, as well as the seasoned developers who are interested in broadening their toolsets are invited to choose from the broad range of tutorials. The conference program will feature keynotes from the leaders in the field as well as stimulating panel discussions from a range of both well-established and up-and-coming companies, as well as researchers from several of the leading academic institutions.

WHAT TO EXPECT AT RISC-V SUMMIT

 

In-Depth Technical Content

The RISC-V conference program dives deep into the RISC-V architecture, commercial and open-source implementations, software and silicon, vectors and security, applications and accelerators, simulation infrastructure and much more.


Visionary Speakers

The Summit gives you unmatched access to the thought leaders who are spearheading the development and adoption of the RISC-V ISA. Our speaker lineup is a who's who of industry experts.

VIEW THE 2019 SPEAKERS
Networking & Parties

No RISC-V Summit is complete without parties and networking events where you can relax, have fun, and mingle with peers and industry influencers.

The event will feature an expo floor happy hour as well as an after party. Stay tuned for more details!

A Jam-Packed Expo Hall

Featuring a mix of industry giants and startups, the expo is the place to explore the latest RISC-V innovations, learn about future implementations, and experience live hands-on product demos.

Interested in exhibiting this year? Contact lori.mikuls@informa.com

VIEW FULL SPONSOR & EXHIBITOR LIST
Members Only Day

Open exclusively to RISC-V International members, Members Only Day will take place on Monday, December 7. Meet up with your peers to discuss all the latest updates in RISC-V the day before the 2020 Summit opens its doors. 

LEARN MORE ABOUT RISC-V INTERNATIONAL
The Largest Global Gathering of RISC-V Leaders

The RISC-V Summit brings the expansive ecosystem together to discuss current and prospective RISC-V projects and implementations, as well as collectively drive the future evolution of the instruction set architecture forward.

PLAN YOUR VISIT

WHO WILL YOU MEET AT RISC-V SUMMIT?

2000+
ATTENDEES FROM THE ENTIRE RISC-V ECOSYSTEM
80+
COMPELLING SPEAKERS DRIVING THE FUTURE OF RISC-V
50+
EXHIBITORS SHOWCASING THE LATEST IMPLEMENTATIONS OF RISC-V TECHNOLOGY