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Pierre is Chief Architect at Microsemi (Microchip Company) leading Customizable SOC (cSOC) Architecture. Pierre is responsible for driving SOC architecture definition, performance modeling and design specification of all ASIC functionality around the FPGA.
Pierre Selwan has over 30 years of experience leading ASIC Design, Silicon and System Architecture Specification. Pierre held various Technical Lead and Senior Management positions at Chips & Technologies and Intel Corporations.
Pierre holds multiple patents related to Graphics and Display ASICs. Recipient of multiple awards at Intel, including Intel Achievement Award. He graduated with BSEE and MSEE from Case Western Reserve University, Cleveland OH in 1984.