RISC-V Summit is part of the Informa Tech Division of Informa PLC

This site is operated by a business or businesses owned by Informa PLC and all copyright resides with them. Informa PLC's registered office is 5 Howick Place, London SW1P 1WG. Registered in England and Wales. Number 3099067.

Informa

December 8 - 10, 2020
Virtual Event

CONTRIBUTE. COLLABORATE. COMMERCIALIZE.

RISC-V Summit is going virtual! Join us online December 8-10

Your chance to network with thought-leaders, technology companies, and researchers spearheading the adoption of this transformative change in the silicon market. Registration will be opening soon - stay tuned!

RISC-V is disrupting the semiconductor industry


The third annual RISC-V Summit will highlight the continued rapid expansion of the RISC-V ecosystem, presenting both commercial offerings and exciting open-source developments. 

Newcomers to RISC-V, as well as the seasoned developers who are interested in broadening their toolsets, are invited to choose from the broad range of tutorials.

The comprehensive 100% virtual event will feature keynotes from industry pioneers as well as thought-provoking panel discussions. Network with thought-leaders, technology companies, and researchers spearheading the adoption of this evolutionary change in the silicon market.

2020 SESSION TRACKS

This year's program will feature exciting new projects and implementations, technical capabilities and commercial implications around the following key topic areas


Community, Ecosystem and Task Groups
Community, Ecosystem and Task Groups

Track Chair: Drew Fustini, BeagleBoard.org Foundation

Hardware Cores/SoCs
Hardware Cores/SoCs

Track Co-Chair: Allen Baum, Esperanto Tech

Track Co-Chair: Chuanhua Chang, Andes Technology

Security & Functional Safety
Security & Functional Safety

Track Co-Chair: Jerome Quevremont,Thales Research & Technology

Track Co-Chair: Helena Handschuh, Rambus


Software & Tools
Software & Tools

Track Co-Chair: Arun Thomas, Draper Laboratories

Track Co-Chair: Gajinder Panesar, CTO, UltraSoC

System Architectures
System Architectures

Track Co-Chair: Andy Glew, SiFive

Track Co-Chair: Kevin Chen, Andes Technology

Verification
Verification

Track Chair: Simon Davidmann, Imperas Software

WHAT TO EXPECT AT RISC-V SUMMIT

 


In-Depth Technical Content
In-Depth Technical Content

The RISC-V conference program dives deep into the RISC-V architecture, commercial and open-source implementations, software and silicon, vectors and security, applications and accelerators, simulation infrastructure and much more.


Visionary Speakers
Visionary Speakers

The Summit gives you unmatched access to the thought leaders who are spearheading the development and adoption of the RISC-V ISA. Our speaker lineup is a who's who of industry experts.

VIEW THE 2019 SPEAKERS
Networking Opportunities
Networking Opportunities

No RISC-V Summit is complete without networking events where you can mingle with peers and industry influencers.

The virtual event will feature engaging networking opportunities and the ability to get in touch with fellow attendees. Stay tuned for more details!


Over 50 Exhibitors Showcasing their Solutions
Over 50 Exhibitors Showcasing their Solutions

Featuring a mix of industry giants and startups, the RISC-V virtual exhibition hall is the place to explore the latest RISC-V innovations, learn about future implementations, and experience product demos and announcements.

Interested in becoming an exhibitor or sponsor this year? Contact lori.mikuls@informa.com

VIEW FULL SPONSOR & EXHIBITOR LIST
Special Member Discounts
Special Member Discounts

Verified RISC-V International members receive large discounts on conference passes. Join us to connect with your peers and discuss the latest industry updates! Stay tuned for more details on registration.

LEARN MORE ABOUT RISC-V INTERNATIONAL
The Premier Global Event for RISC-V Leaders
The Premier Global Event for RISC-V Leaders

The RISC-V Summit brings the expansive ecosystem together to discuss current and prospective RISC-V projects and implementations, as well as collectively drive the future evolution of the instruction set architecture forward.

PLAN YOUR VISIT

WHO WILL YOU MEET?

2000+
ATTENDEES FROM THE ENTIRE RISC-V ECOSYSTEM
80+
COMPELLING SPEAKERS DRIVING THE FUTURE OF RISC-V
50+
EXHIBITORS SHOWCASING THE LATEST IMPLEMENTATIONS OF RISC-V TECHNOLOGY