RISC-V Summit is part of the Informa Tech Division of Informa PLC

This site is operated by a business or businesses owned by Informa PLC and all copyright resides with them. Informa PLC's registered office is 5 Howick Place, London SW1P 1WG. Registered in England and Wales. Number 3099067.

Informa

Chuan-Hua Chang
Associate Vice President at Andes Technology

Profile

Chuanhua Chang is the Associate VP and the lead of RD/architecture division of Andes Technology Corporation. He has an EECS Ph.D. degree from University of Michigan. He has worked in the processor design area for more than 20 years. Before Andes Technology Corporation, Dr. Chang worked on a Digital Signal Processor design project in the SoC Technology Center of ITRI in Taiwan. He also worked in Intel's Massachusetts Microprocessor Design Center as a micro/architecture lead for a 64-bit superscalar OoO processor. Before that, Dr. Chang worked in Digital Equipment Corporation designing Alpha 21264 and 21464 processors.

Agenda Sessions

  • AndesClarity: a Performance & Bottleneck Analyzer for RISC-V Vector Processors

    3:30pm

Speakers at this event