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Jérôme Quévremont
RISC-V and Open Hardware Project Leader at Thales Research & Technology


Jérôme Quévremont graduated in telecommunications and electronics in 1995 (Télécom Bretagne, now IMT Atlantique). After developing telecom and security integrated circuits at Texas Instruments and Thales Communications, in 2007 he headed a development lab, specialized in specifying, developing and validating secure- and crypto-chips in ASIC and FPGA technologies. His main expertise is related to ASICs and systems-on-chip in the field of networks, radio, cryptography, hardware-reconfigurable platforms, multi-cores and trusted computing. In March 2020, he joined Thales Research & Technology as an architect and a project leader in the field of RISC-V and open hardware, with special interest on embedded efficient computing, functional safety and security.