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Mitesh Jain
Staff R&D Engineer at Synopsys Inc


At Synopsys, I am working on developing automated verification tools for sequential equivalence checking. I have eight plus years of industry experience in designing high-performance microprocessors and low-power DSP cores. I have worked on several aspects of the microprocessor design ranging from digital design, verification, and performance modeling. My main research is in mechanized formal verification and validation of  reactive systems.

Agenda Sessions

  • An Efficient Runtime Validation Framework based on the Theory of Refinement